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AXI Chip2Chip v5.0 LogiCORE IP Product Guide (PG067) Xilinx, Inc. Acrobat Distiller 15.0 (Windows) PG067, AXI, chip2chip, bridge, common clock, independent clock, selectio, UltraScale+ uuid:ae210b2a-ba5a-4e33-837f-f016907b9811 uuid:3ba5405d-87ab-4cfd-824d-5a937b7f032c 2020-11-24T11:04:39+05:30 endstream endobj 2594 0 obj << /Author (Xilinx, Inc.) /CreationDate (D:20201124104648Z) /Creator (FrameMaker 2019.0.5) /Keywords (PG067, AXI, chip2chip, bridge, common clock, independent clock, selectio, UltraScale+) /ModDate (D:20201124110439+05'30') /PostProcess (v2020.2.0.1) /Producer (Xilinx, Inc. via ABCpdf) /Subject (The AXI Chip2Chip core supports multiple FPGA-to-FPGA interfacing options and provides a low pin coun\ t, high-performance AXI chip-to-chip bridging solution.) /Title (AXI Chip2Chip v5.0 LogiCORE IP Product Guide \(PG067\)) /XilinxDocID (PG067) >> endobj 2595 0 obj << /Dests 856 0 R /EmbeddedFiles 2590 0 R >> endobj 2596 0 obj << /Count 13 /First 2618 0 R /Last 2618 0 R /Type /Outlines >> endobj xref 0 2597 0000000000 65535 f 0000056876 00000 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