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H/;;d쭮 vK*R}]HxMxpPuQ^s>KBBXQP jVB*MGԝOM؄Ht ]L]|މYs'fe_AΩ~rW Fקӓĝc&k^:8h!!I+ciNhit7I?;FZc˘yդj\@v;<|7bftjr vqMZ`+j!IA񢮡Ip),*ʍ~o1}5P<;+ْ 9N/ 4k wdzzʅN! /+۔c;֘ztaS_ͩiδʾ Y2iOܗ,x xg10o\k:<5ŠbX K'F^e]:S`S ʍ}˲t0B@tn߆+66fQ:'>wP{zzvyqv\y~?V?!YS^EpKOO_}O.SW׶׶O`'/ e1B^:ՖK1 gćϸ,vkݔv0iG}Qwvdk-,^.w$fZczd)Y3w:>>,OA^&'GC_*vŮu641"r0։:9׬0瓏]t-j;zݕncцu_Sb|y"0Lzϵ]f&ro M&`A)%"Uɩ <@>4 %bF B{9u;>*QGA}Uܣdi1jeoц`AӨ"9 a[+T!P}iUӨM1 x`& rtleF`9JJg,n5  [*XTq xMeQJv6ӭZl GWjtFB 5vH:~Gn yn]6ȱIH>$9>}R%Bb*[#. ؒl᝺]whhlqvA%L+`|A^eD1s| 3vmU`H D1FjL,,D)D89h)Wd֮P/H9C0%C P[%~[oP鵓hY y몰BN}ixObw_VI ^O6=nd[w/N>_2q }>>?*"}䬺 HilIRAY mDj$t늫Gh4SUtITt& R^ۆDm|#Nt:~Ǣ#0|ry3@4Ӱys|jJ%@OU>5#2*My dn :"1>hYP6%S$5N@:,b49HkuB9%,0=Qtwߚ1="W!K=o-;LpzDTPV>iI%C7:ewԒ7D5>Ƈ{g$ƴȵ"ߙztO[#>ס[t.{T*Z*jMʢ0'Z::Mj浧BL';4&ЕN=&+ `c*̿9JsԜėzƕ0,m*%BBz̶ }u@lрZV+}I9yMdg>Ϙ}K:/.ec%y/z1MZbwVA4#?bcav{\%Mp&a^f>/wb,^u ,UW +ץX<2 &HiRkPi88;& (FNk7'LD))EbSil-bgÍ֨AFpwG>_Pϋ-畢X|ej<H,V*$&~p2n7[QEQ¬02Bߑ⚌_ *N^ƬR$JC><HY. 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Provides a high performance, low latency 100 Gb/s Ethernet port that allows for a wide range of user customization and statistics gathering. The dedicated block provides both the 100G MAC and PCS logic with support for IEEE 1588-2008 two-step hardware timestamping. Acrobat Distiller 15.0 (Windows) Virtex UltraScale+,ultrascale+,rs-fec, segmented LBUS, Vivado Design Suite, QuestaSim, XDC, CAUI, IEEE 1588 v2 PTP, IEEE 802.3bd,IEEE 802.3ba,pg165 uuid:0e709067-c0ce-4f6b-b736-cdeda3c8a7de uuid:a689de1f-9fce-4b13-9585-b119ca2be35c 2016-04-11T11:33:47+06:00 endstream endobj 12535 0 obj << /Author (Xilinx, Inc.) /CreationDate (D:20160411111415Z) /Creator (FrameMaker 2015.2) /Keywords (Virtex UltraScale+,ultrascale+,rs-fec, segmented LBUS, Vivado Design Suite, QuestaSim, XDC, CAUI, IEE\ E 1588 v2 PTP, IEEE 802.3bd,IEEE 802.3ba,pg165) /ModDate (D:20160411113347+06'00') /Producer (Xilinx, Inc. via ABCpdf) /Subject (Provides a high performance, low latency 100 Gb/s Ethernet port that allows for a wide range of user \ customization and statistics gathering. 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