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The dedicated block provides both the 100G MAC and PCS logic with support for IEEE 1588-2008 two-step hardware timestamping. UltraScale+ Devices Integrated 100G Ethernet Subsystem v2.4 Product Guide (PG203) Xilinx, Inc. Acrobat Distiller 15.0 (Windows) Virtex UltraScale+,ultrascale+,rs-fec, segmented LBUS, Vivado Design Suite, QuestaSim, XDC, CAUI, IEEE 1588 v2 PTP, IEEE 802.3bd,IEEE 802.3ba,pg165 uuid:7b79817b-284e-4521-ac99-6fc996ac1eb6 uuid:c28ea478-0f2c-462a-a3fe-7c2d15254f3f 2018-03-26T14:41:45+06:00 endstream endobj 16721 0 obj << /Author (Xilinx, Inc.) /CreationDate (D:20180326142251Z) /Creator (FrameMaker 2015.0.5) /Keywords (Virtex UltraScale+,ultrascale+,rs-fec, segmented LBUS, Vivado Design Suite, QuestaSim, XDC, CAUI, IEE\ E 1588 v2 PTP, IEEE 802.3bd,IEEE 802.3ba,pg165) /ModDate (D:20180326144145+06'00') /Producer (Xilinx, Inc. via ABCpdf) /Subject (Provides a high performance, low latency 100 Gb/s Ethernet port that allows for a wide range of user \ customization and statistics gathering. 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