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The dedicated block provides both the 100G MAC and PCS logic with support for IEEE 1588-2008 two-step hardware timestamping. UltraScale+ Devices Integrated 100G Ethernet Subsystem v2.6 Product Guide Xilinx, Inc. Acrobat Distiller 15.0 (Windows) Virtex UltraScale+,ultrascale+,rs-fec, segmented LBUS, Vivado Design Suite, QuestaSim, XDC, CAUI, IEEE 1588 v2 PTP, IEEE 802.3bd,IEEE 802.3ba,pg165 uuid:3735340e-55fa-403f-b39d-9f6ad8094606 uuid:d68572d4-f4c7-4775-bd6f-9539f761bc71 2019-05-14T12:07:00+07:00 endstream endobj 17203 0 obj << /Author (Xilinx, Inc.) /CreationDate (D:20190510163701Z) /Creator (FrameMaker 2015.0.5) /Keywords (Virtex UltraScale+,ultrascale+,rs-fec, segmented LBUS, Vivado Design Suite, QuestaSim, XDC, CAUI, IEE\ E 1588 v2 PTP, IEEE 802.3bd,IEEE 802.3ba,pg165) /ModDate (D:20190514120700+07'00') /PostProcess (v2019.1.0.4) /Producer (Xilinx, Inc. via ABCpdf) /Subject (Provides a high performance, low latency 100 Gb/s Ethernet port that allows for a wide range of user \ customization and statistics gathering. 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