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>> /F (TDL_Xilinx.joboptions) /Type /Filespec /UF (\000T\000D\000L\000_\000X\000i\000l\000i\000n\000x\000.\000j\000o\000b\000o\000p\000t\000i\000o\000\ n\000s) >> endobj 4402 0 obj << /Author (Xilinx, Inc.) /CreationDate (D:20170414154357Z) /Creator (FrameMaker 2015) /Keywords (partial reconfiguration, device repurposing, FPGA dynamic reconfiguration, reprogramming, PR) /ModDate (D:20170417201058+06'00') /Producer (Xilinx, Inc. via ABCpdf) /Subject (Discusses the Xilinx Partial Reconfiguration \(PR\) design methodology within the Vivado Design Sui\ te. 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