SDSoC Platform Interfaces to External Memory

Important: The syntax and implementation of this pragma might be revised in a future release.
The syntax for this pragma is: 
#pragma SDS data sys_port(ArrayName:port)

This pragma must be specified immediately preceding a function declaration, or immediately preceding another #pragma SDS bound to the function declaration, and applies to all the callers of the function.

Some notes about the syntax:
  • ArrayName must be one of the formal arguments of the function definition.
  • port must be ACP or AFI or MIG. The Zynq-7000 All Programmable SoC provides a cache coherent interface between programmable logic and external memory (S_AXI_ACP) and high-performance ports (S_AXI_HP) for non-cache coherent access (AFI). If no sys_port pragma is specified for an array argument, the interface to external memory is determined automatically by the SDSoC system compilers, based on array memory attributes (cacheable or non-cacheable), array size, data mover used, etc. This pragma overrides the SDSoC compiler choice of memory port. MIG is valid only for the zc706_mem platform.
  • Multiple arrays can be specified in one pragma, separated by commas.

Example 1

The following code snippet shows an example of using this pragma:
#pragma SDS data sys_port(A:AFI)
void foo(int A[1024], int B[1024])

In the above example, if the caller passes an array allocated with malloc to A, the SDSoC compiler uses the AFI platform interface, even though this might not be the optimal choice.