References

  1. SDAccel™ Development Environment web page
  2. Vivado® Design Suite Documentation
  3. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
  4. Vivado Design Suite User Guide: Creating and Packaging Custom IP (UG1118)
  5. Vivado Design Suite User Guide: Partial Reconfiguration (UG909)
  6. Vivado Design Suite User Guide: High-Level Synthesis (UG902)
  7. UltraFast Design Methodology Guide for the Vivado Design Suite (UG949)
  8. Vivado Design Suite Properties Reference Guide (UG912)
  9. Khronos Group web page: Documentation for the OpenCL standard
  10. Xilinx® Virtex® UltraScale+™ FPGA VCU1525 Acceleration Development Kit
  11. Xilinx® Kintex® UltraScale™ FPGA KCU1500 Acceleration Development Kit