%PDF-1.6
%
1710 0 obj
<>
endobj
1787 0 obj
<>stream
application/pdf
The LogiCORE IP AXI Chip2Chip core supports multiple FPGA-to-FPGA interfacing options and provides a low pin count, high-performance AXI chip-to-chip bridging solution.
PG067, AXI, chip2chip, bridge, common clock, independent clock, selectio
The LogiCORE IP AXI Chip2Chip core supports multiple FPGA-to-FPGA interfacing options and provides a low pin count, high-performance AXI chip-to-chip bridging solution.
2013-03-10T16:49:02.959-07:00
Xilinx, Inc.
Xilinx PG067 LogiCORE IP AXI Chip2Chip v1.00.a, Product Guide
2012-07-16T08:45:48-07:00
2012-07-16T01:27:56-07:00
2012-07-16T08:45:48-07:00
FrameMaker 10.0.2
/content/dam/xilinx/support/documentation/ip_documentation/axi_chip2chip/v1_00_a/pg067-axi-chip2chip.pdf/_jcr_content/renditions/original
applications:ip-functions/interconnect-infrastructure
support:product-type/ip-documentation
products:ip-core/axi-chip2chip
support:document-class/document-type/product-guide
bff6ca7be3d871d8372bba8b682427ab1b83820d
2013-03-05T22:32:56.127-08:00
Acrobat Distiller 9.0.0 (Windows)
Xilinx, Inc.
"PG067, AXI, chip2chip, bridge, common clock, independent clock, selectio"
Acrobat Distiller 9.0.0 (Windows)
uuid:f1947c43-faa2-46b1-98ef-bc5eb995881d
uuid:05a23254-9527-4d5f-bc33-bf106d12b825
endstream
endobj
1721 0 obj
<>
endobj
1731 0 obj
<>
endobj
1701 0 obj
<>
endobj
1703 0 obj
<>
endobj
1704 0 obj
<>
endobj
1705 0 obj
<>
endobj
1706 0 obj
<>
endobj
1707 0 obj
<>
endobj
155 0 obj
<>
endobj
160 0 obj
<>
endobj
165 0 obj
<>
endobj
170 0 obj
<>
endobj
171 0 obj
<>stream
h[[w6~9"qɢ(̓d<wwlg\%JTUN]|ٿ1'_.> Tnrv-$ dYswt͕5wۣL'Ei3I6(1/Rj?h,rS&uZSɪ$ͤ룓Xs}{dӤLJ|Rzy+4*z~4K4Qtssv=deV
T!HhIG#6ǂ_p29bذK-oqF
^LtTxAm3Ҋh+c²`jbV%h椗YR;pJQm0,h]CZ`H:D#dV&ʁW2K(Rjy9֬E>m/Ċ7ܙJ q5
B!oф*9jQ*IMOP/=*ZU
n&,(n̚,'ˬRdb+
vN$Ǡ͔#hnb.s8FOSKfgZ>O>DK
0IūY$wg-6BJUKyM,J)oH}U6hdV!;88ղ1'eDzjdH8't@ƚaVhfHGlP0HDr/pʲ?vrD!(uY
\I^eUEY