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This core core is used with EDK. The AXI DMA engine provides high-bandwidth direct memory access between memory and AXI Stream-type target peripherals. Its scatter/gather capabilities also offload data movement tasks from the CPU. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface
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This core core is used with EDK. The AXI DMA engine provides high-bandwidth direct memory access between memory and AXI Stream-type target peripherals. Its scatter/gather capabilities also offload data movement tasks from the CPU. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface
2013-03-10T16:52:09.753-07:00
Xilinx, Inc.
Xilinx DS781 LogiCORE IP AXI DMA (v4.00a), Data Sheet
2011-05-06T13:47:39-07:00
2010-03-26T08:03:18-07:00
2011-05-06T13:47:39-07:00
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2013-03-05T22:45:34.109-08:00
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Xilinx, Inc.
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