%PDF-1.6
%
4563 0 obj
<>
endobj
4705 0 obj
<>stream
application/pdf
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core providing high-bandwidth direct memory access between memory and AXI4-Stream-video type target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
pg020,Genlock,vdma,Data Re-Alignment Engine, DRE, AXI4, AXI4-Lite,AXI4-Stream,Virtex-7,Virtex7,Virtex 7,V-7,V7,V 7,Kintex-7,Kintex7,Kintex 7,K-7,K7,K 7, Artix-7,Artix7,Artix 7,A-7,A7,A 7,Zynq-7000,Zynq,genlock,Vsync,Hsync,Vivado,Vivado IP Catalog,Vivado Design Suite,020
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core providing high-bandwidth direct memory access between memory and AXI4-Stream-video type target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
2013-04-01T10:20:24.666-07:00
Xilinx, Inc.
Xilinx PG020 LogiCORE IP AXI Video Direct Memory Access (axi_vdma) v6.0 Product Guide
2013-03-20T07:09:58-07:00
2013-03-19T05:16:19-07:00
2013-03-20T07:09:58-07:00
FrameMaker 10.0
4b2dd8282d9bec8c3840ac1aa53a3bf1d763c1a3
2013-04-01T10:20:21.086-07:00
Acrobat Distiller 10.0.0 (Windows)
Xilinx, Inc.
"pg020,Genlock,vdma,Data Re-Alignment Engine, DRE, AXI4, AXI4-Lite,AXI4-Stream,Virtex-7,Virtex7,Virtex 7,V-7,V7,V 7,Kintex-7,Kintex7,Kintex 7,K-7,K7,K 7, Artix-7,Artix7,Artix 7,A-7,A7,A 7,Zynq-7000,Zynq,genlock,Vsync,Hsync,Vivado,Vivado IP Catalog,Vivado Design Suite,020"
Acrobat Distiller 10.0.0 (Windows)
products:ip-core/axi-video-dma
products:ip-core/axi-video-direct-memory-access
products:ip-core/video-and-image-processing-pack
applications:ip-functions/interconnect-infrastructure/axi4-stream
applications:ip-functions/interconnect-infrastructure/axi4
applications:topic/embedded-processing/memory-interface
support:product-type/ip-documentation
products:ip-core/video-processing-pack
support:document-class/document-type/product-guide
products:device/soc/zynq-7000
products:device/fpga/virtex-7
products:device/fpga/kintex-7
products:device/fpga/artix-7
applications:ip-functions/interconnect-infrastructure/axi4-lite
products:device/fpga/7-series
uuid:2166b944-952b-4897-9259-81f6b684286e
uuid:59f8444b-b0d9-4297-9f43-42d6e50218ab
endstream
endobj
4564 0 obj
<>
endobj
4579 0 obj
<>
endobj
4547 0 obj
<>
endobj
4549 0 obj
<>
endobj
4550 0 obj
<>
endobj
4551 0 obj
<>
endobj
4552 0 obj
<>
endobj
4553 0 obj
<>
endobj
4554 0 obj
<>
endobj
4555 0 obj
<>
endobj
4556 0 obj
<>
endobj
551 0 obj
<>
endobj
557 0 obj
<>
endobj
563 0 obj
<>
endobj
574 0 obj
<>
endobj
580 0 obj
<>
endobj
586 0 obj
<>
endobj
593 0 obj
<>
endobj
599 0 obj
<>
endobj
617 0 obj
<>
endobj
628 0 obj
<>
endobj
633 0 obj
<>stream
h[nIr}W$TˬaYڢ%Ybwpc ~7:Ήꋤ6PU'"w{ݮ2kWUT.J8\fMӸewtsV1/bik,rWFM'sQj˫WWKQGMbO2*tWXXX^G)HMW7>XX'cEi^XY}'Y|4I仳}BIe5dTUu5¥17Jă&;GxG'ef=A1@@o'U*#JB{e2ЃZr)
*(CwBi%"ۭ`Nw%)?O#ٶ5*\Ut,&6܊W&Txo-J*.vT/'xh*AtKel*ƫ鸪ǭ^JS:#`_Q4_k
${FP|:Zd|~P'С%Yp#Y
!Q"`TMўֲ\2tKiR< ,'(?YQv