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The LogiCORE IP JESD204 core implements a JESD204A interface supporting a line rate of 3.125 Gb/s on 1, 2 or 4 lanes using GTX transceivers in Virtex-6 and Kintex-7 Field Programmable Gate Arrays (FPGAs). The JESD204 core can be configured as Transmit, Receive or Duplex.
DS814,Virtex,Kintex,IP,cores,AXI,Kintex-7,Kintex7,Kintex 7,K-7,K7,K 7,Virtex-6,Virtex6,Virtex 6,V-6,V6,V 6,,AXI4,AXI4-Lite,AXI4-Stream,JEDEC,CORE Generator,coregen,Initial Lane Alignment, ILA,814
The LogiCORE IP JESD204 core implements a JESD204A interface supporting a line rate of 3.125 Gb/s on 1, 2 or 4 lanes using GTX transceivers in Virtex-6 and Kintex-7 Field Programmable Gate Arrays (FPGAs). The JESD204 core can be configured as Transmit, Receive or Duplex.
2013-03-10T19:10:33.506-07:00
Xilinx, Inc.
Xilinx DS814 LogiCORE IP JESD204 (v1.1), Data Sheet
2011-10-08T04:28:29-07:00
2010-03-09T01:51:05-08:00
2011-10-08T04:28:29-07:00
FrameMaker 9.0
/content/dam/xilinx/support/documentation/ip_documentation/jesd204/v1_1/ds814_jesd204.pdf/_jcr_content/renditions/original
applications:ip-functions/communication-and-networking/telecommunications
applications:ip-functions/interconnect-infrastructure/axi4-stream
products:device/fpga/virtex-6
applications:ip-functions/communication-and-networking
applications:ip-functions/interconnect-infrastructure/axi4
products:device/fpga/kintex-7
support:document-class/document-type/data-sheets
products:ip-core/jesd204
products:device/fpga/virtex
applications:topic/communication-and-networking
support:product-type/ip-documentation
applications:ip-functions/communication-and-networking/serial-interface
applications:topic/communication-and-networking/serial-interface
applications:ip-functions/communication-and-networking/wireless
applications:topic/communication-and-networking/wireless
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2013-03-05T22:25:00.44-08:00
Acrobat Distiller 9.2.0 (Windows)
Xilinx, Inc.
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Acrobat Distiller 9.2.0 (Windows)
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