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A core highly programmable through a comprehensive register set allowing control of various timing generation parameters. Xilinx DS857 LogiCORE IP Video Timing Controller v3.0, Data Sheet 2009-02-11T21:12:36Z FrameMaker 9.0 2011-06-13T16:17:07Z Acrobat Distiller 9.4.2 (Windows) ds857, video timing controller, horizonal/vertical synchronization pulses, polarity, blanking timing, active video pixels, LogiCORE, Spartan6LX, S6LX, Spartan-6LX, V5, Virtex-5, Virtex5, S3A DSP, Spartan3A DSP, Spartan-3A DSP, Virtex6LX, V-6LX, V6LX, Virtex-7, Kintex-7, V7, K7, AXI 2009 - 2011 2009 - 2011 uuid:44a504e7-cdf3-41fa-badb-5f804079b986 uuid:5f90ff31-d745-4735-ac89-8165c6b80ad1 endstream endobj 6479 0 obj <> endobj xref 0 6480 0000000000 65535 f 0000074162 00000 n 0000074311 00000 n 0000074440 00000 n 0000074543 00000 n 0000074802 00000 n 0000078676 00000 n 0000079125 00000 n 0000079687 00000 n 0000079834 00000 n 0000091691 00000 n 0000091727 00000 n 0000097334 00000 n 0000097516 00000 n 0000097646 00000 n 0000097749 00000 n 0000097856 00000 n 0000097963 00000 n 0000098070 00000 n 0000098177 00000 n 0000098376 00000 n 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