Vitis Utilities - betway必威登陆

Xilinx Software Command-Line Tool

Xilinx Software Command-line Tool (XSCT) is an interactive and scriptable command-line interface to the Vitis IDE. As with other Xilinx tools, the scripting language for XSCT is based on Tools Command Language (Tcl). You can run XSCT commands interactively or script the commands for automation. XSCT supports the following actions:

Create hardware, domains/board support packages (BSPs), and application projects
Manage repositories
Set toolchain preferences
Configure and build domains/BSPs and applications
Download and run applications on hardware targets
Create and flash boot images by running Bootgen and program_flash tools.

For more information on XSCT, see the Xilinx Software Command-Line Tool section.

Program FPGA

Program the FPGA with the bitstream.

The following table lists the options available on the Program FPGA dialog box:

Hardware Configuration: Specify the Bitstream and BMM files. These are provided by Vivado® Design Suite when you export your hardware design to the Vitis software platform.
Bitstream File: Specify the FPGA Bitstream.
BMM File: Specify the BMM file.
Software Configuration: Specify the program that is initialized at the reset start address for each processor in the Block RAM.
Processor: Name of the processor in the system.
ELF file: Specify the ELF file to initialize.
Program: Click this button to program the FPGA.
Device: By default, the Vitis software platform can detect devices on the JTAG chain and select the device that matches the hardware information in bitstream.
BMM/MMI File: Only for MicroBlaze design. These files store the BRAM name and location information of MicroBlaze. They are generated by Vivado.

Dump/Restore Data File

The Vitis software platform allows you to copy the contents of a binary file to the target memory, or copy binary data from target memory to a file, through JTAG.

Select the processor in which you want to dump/restore the data There are two options:

Dump memory

For this, select the location in which the dump data file will be saved.

Restore memory

For this, select the path of the .bin file.
Give the start address and size (in bytes) and click OK to proceed.

Launch Shell

Launch a command console window with Xilinx settings. This shell can be used for running XSDB, XSCT commands.

Project Export and Import

The Vitis IDE provides a simplified method for exporting or importing one or more Vitis IDE projects within your workspace. You can optionally include associated project build folders.

Export a Vitis Project

When exporting a project, the project is archived in a zip file with all the relevant files needed to import to another workspace.

To export a project, select File > Export from the main menu.
The Export Vitis Projects dialog box opens, where you select the project or projects in the current workspace to export as shown in the following figure.
To change the name for the archive, edit the Archive File field.
To include the current build configurations, enable Include build folders at the bottom of the window.
TIP: This can significantly increase the size of the archive, but might be necessary in some cases.
To create the archive with your selected files, click OK to create the archive.

The selected Vitis IDE projects will be archived in the specified file and location, and can be imported into the Vitis IDE under a different workspace, on a different computer, by a different user.

Import a Vitis Project

To import a project, select File > Import from the top menu.
This opens the Import Projects dialog box to select the import file type. There are two types of files you can select to import:

Vitis project exported zip files

Lets you import projects previously exported from the Vitis IDE as discussed in Export a Vitis Project.

Eclipse workspace or zip file

Lets you import projects from another Vitis IDE workspace.
The following figure shows the dialog box that is opened when you select Eclipse workspace or zip file and click Next.
For Select root directory, point to a workspace for the Vitis IDE, and specify the following options as needed:

Search for nested projects

Looks for projects inside other projects in the workspace.

Copy projects into workspace

Creates a physical copy of the project in the current open workspace.

Close newly created imported projects upon completion

Closes the projects in the open workspace after they are created.
Click Finish to import the projects into the open workspace in the Vitis IDE.

Generating Device Tree

The Vitis IDE can integrate device-tree-generator as a domain in the platform. It parses the information in XSA and generate device tree. Device-tree-generator is an open-source project hosted on Xilinx GitHub. Settings of device-tree-generator can be modified in Vitis IDE. The Vitis IDE can generate device trees. To generate a device tree, follow these steps:

Select Xilinx > Repositories.
Click New.
Provide the local path for the device tree generator, which can be downloaded from GitHub.
Select Xilinx > Generate Device Tree to open the Device Tree Generator.
Provide the hardware specification file and the output directory (the output will be created here).
You can change the settings for device tree blob (DTB) using the Modify Device Tree settings. The device tree path displays after successful generation.