Vitis Software Platform Release Notes

This section contains information regarding the features and updates of the Vitis™ software platform in this release. It also contains information regarding the features and updates of the Vitis software platform for Versal™ AI Engine development.

What's New

For information about what's new in this version of the Vitis™ unified software development platform, see the Vitis What's New Page.

Supported Platforms

Data Center Accelerator Cards

Access the latest Vitis target platforms for Alveo™ Data Center accelerator cards at www.xilinx.com/products/boards-and-kits/alveo.html.

Refer to Alveo Data Center Accelerator Card Platforms User Guide (UG1120) for specifications of each accelerator card and available target platforms. The Getting Started section for each accelerator card has information for deploying your applications on that card.

Refer to Installing Xilinx Runtime and Platforms for more information on setting up XRT and platforms.

Embedded Platforms

Embedded platforms available for use with the Vitis core development kit can be found at the Embedded Platforms download page. Embedded processor platforms such as the Zynq UltraScale+ MPSoC ZCU104/ZCU102 base platform as well as Zynq-7000 base platforms can be optionally used for both the Vitis application acceleration development flow, and the Vitis embedded software development flow.

Versal Platform for AI Engine Development

The VCK190 platform is available for use with the Vitis application acceleration development flow, as described in Versal ACAP AI Engine Programming Environment User Guide (UG1076). The platform enables development of designs that include:

  • AI Engine graphs and kernels
  • Programmable Logic kernels
  • Host application targeting the Linux or a bare metal OS running on the Arm processor in the Versal device.

Changed Behavior

Table 1. Changed Behavior SummaryThe following table specifies differences between this release and prior releases that impact behavior or flow when migrating.
Area Behavior
Vitis IDE

Previously, accelerated application projects had a system project that contained the application project. This application project contained all the source code and build instructions in a single project. There is now a new project hierarchy that creates a top-level system project with separate projects for each element: a host application project, a hardware kernels project, and a hw_link project. Instead of creating an application project, you now need to create a PL kernel project. The top-level system project is automatically created as part of this process.

Existing projects from earlier releases must to be updated to the new project hierarchy. When you open the older projects, you will be prompted to upgrade the project to the new structure. The tool will handle this upgrade for you. It is recommended to back up your existing projects before the upgrade.
Vitis compiler The --profile_kernel command has become the --profile command.
The --dk command has become the --debug command.
The --package command previously did not require renaming the xclbin file, but now either renames the output file to a.xclbin by default, or names it according to the -o option.
Vitis HLS The DISAGGREGATE pragma or directive previously could not be applied to structs on the interface. Disaggregating structs on the interface is now supported.
The ARRAY_PARTITION pragma and directive was not previously supported for arrays defined on the function interface. It is supported in this release.

Known Issues

Known issues for the Vitis software platform are available in AR#73646.