AR# 34934

描述

Spartan-6 devices include up to four Memory Controller Blocks (MCBs). For multi-controller (multi-MCB) designs, combining or sharing PLL and BUFPLL_MCB saves resources.

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解决方案

If the MCBs are on the same side of the device, the BUFPLL_MCB must be shared, which requires the interfaces to run at the same frequency.You can find anexample diagram in the Spartan-6 FPGA Memory Controller User Guide(UG388). For more information, please see Figure 3-3: Recommended System and Calibration Clock Distribution.

If the MCBs are on both sides of the device, the PLL can be shared. The one PLL then drives two BUFPLL_MCBs (one on each side of the device).

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