2. 技术支持
  3. AR# 3657: MAP, PAR: Does Map or PAR insert global buffers on high fanout nets and/or unbuffered clock nets?
  4. AR# 36575: MIG v3.0-3.5, Spartan-6 MCB - Refresh period is too large

AR# 36575

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MIG v3.0-3.5, Spartan-6 MCB - Refresh period is too large

描述

The JEDEC standards for DDR SDRAM memories (i.e., DDR, LPDDR, DDR2, DDR3) state a refresh rate of 7.8 microseconds must be adhered to.

In testing, it was found that the refresh rate for the MCB was 7.85 microseconds.
 
The period needs to be modified to ensure that the JEDEC standard refresh rate of 7.8 microseconds is met. 

This Answer Record details the required changes.

解决方案

Work-around:

To resolve this issue, the refresh period must be reduced.

Step 1 - Subtract 25 from the Refresh Counter.
 
In testing, subtracting 25 from the period calculation has resulted in a true 7.8 microseconds refresh period.

To reduce the refresh period, modify the MEM_REFI_VAL calculation provided in the mcb_raw_wrapper.v/.vhd module. 

The example below is for Verilog, but similar changes should be made for VHDL.

From:
 

localparam MEM_REFI_VAL = ((C_MEM_TREFI + C_MEMCLK_PERIOD -1) /C_MEMCLK_PERIOD);


To:
 

localparam MEM_REFI_VAL = ((((C_MEM_TREFI + C_MEMCLK_PERIOD -1) /C_MEMCLK_PERIOD)) 25);




Step 2 - Avoid a tRFC Violation.

Simply subtracting 25 from the refresh counter causes tRFC violations.

To avoid these violations, time needs to be added to the top-level parameter C_MEM_TZQINIT_MAXCNT. 

This parameter is set in the memcx_wrapper.v/.vhd module. 

The example below is for Verilog but similar changes should be made for VHDL.

From:
 

localparam C_MEM_TZQINIT_MAXCNT      = 10'd512;


To:

localparam C_MEM_TZQINIT_MAXCNT      = 10'd512 + 10'd16;   // 16 clock cycles are added to avoid trfc violations


The above noted changes will be made in MIG 3.6 which will be released with ISE software 12.3.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
36211 MIG v3.5 - Release Notes and Known Issues for ISE Design Suite 12.2 N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
35180 Spartan-6 - 12.4 Software Known Issues related to the Spartan-6 FPGA N/A N/A
AR# 36575
日期 08/21/2014
状态 Active
Type 综合文章
器件
IP
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