AR# 39681

描述

解决方案

There is no Tin specification for Spartan-6 FPGA. The transition time on the input does not make a difference as long as it is a monotonic rise or fall.
The main concern is that the input remains High or Low long enough to meet all required setup times inside of the device.

As long as the design can meet timing with the input signal once it has gone past the Vih or Vil point in its transition, the signal should be detected correctly.