AR# 4126: Orcad: Taking a design from Capture, through XACTStep6, to Simulate
AR# 4126
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Orcad: Taking a design from Capture, through XACTStep6, to Simulate
描述
Keywords: xnf2vhdl, capture, simulate, orcad
Urgency: standard
General description: How can I create a Xilinx design in Capture, take it through the Xilinx tools, and then simulate it with Simulate?
解决方案
Follow either of the following procedures:
1.Create a design in Capture using a Xilinx library. 2.Create an XNF netlist in Capture using TOOLS->Create Netlist->XNF. 3.Point to directory containing Xilinx macro netlists using the -d option of XNFMERGE 4.From there you can run the XactStep6 tools to merge, place and route the XNF file(s). 5.Run XNF2VHDL in Simulate on the result of step 4). 6.Make a project and add that VHD file in Simulate. From this point you should be able to perform the simulation.
1.Create a design in Capture using a Xilinx library. 2.Create a VST netlist in Capture which will produce an INF file. 3.Run SDT2XNF from the command line in XACT6. SDT2XNF will be on the Xilinx v6.00 CD in the OrCAD directory. 4.From there you can run the Xilinx v6.00 Windows to merge, place and route the XNF file(s). 5.Run XNF2VHDL in Simulate on the result of step 4). 6.Make a project and add that VHD file in Simulate. From this point you should be able to perform the simulation.
The process above doesn't require Annotate.exe, Inet.exe, or Sdt_c.exe. Modifying XSIMMAKE.XFW to omit Annotate and Inet should still produce the same result above.