2. 技术支持
  3. AR# 4162: 3.1i TRCE - Timing loop reported for Virtex designs with DLL's
  4. AR# 41624: 7 Series MIG DDR3 SDRAM - Is external termination on DQ and DQS required in High Range (HR) banks?

AR# 41624

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7 Series MIG DDR3 SDRAM - Is external termination on DQ and DQS required in High Range (HR) banks?

描述

7 Series MIG DDR3 SDRAM designs can be generated in either High Range (HR) or High Performance (HP) banks. DCI is available in the HP banks but not available in the HR banks. Because DCI is not available in HR banks, is external termination required on DQ/DQS?

NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

解决方案

7 Series FPGAs include IN_TERM termination in the HR banks. Using IN_TERM in the HR banks is recommended over external termination. Starting with 7 Series MIG 1.2, MIG tool includes an IN_TERM option where users can select between:
- off
- 40 ohm
- 50 ohm
- 60 ohm

Based on the GUI selection, the MIG generated UCF will then set the IN_TERM to:

- NONE
- UNTUNED_SPLIT_40
- UNTUNED_SPLIT_50
- UNTUNED_SPLIT_60

The IN_TERM settings were supportedstarting with ISE Design Suite 13.2.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
51474 MIG 7 Series Design Assistant - DDR2/DDR3, Termination and I/O Standard Guidelines N/A N/A
AR# 41624
日期 02/28/2013
状态 Active
Type 解决方案中心
器件
IP
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