This section of the MIG Design Assistant focuses on the available DDR Commands that you can run for the Spartan-6 Memory Controller Block(MCB) design. Below you will find information related to your specific question.
Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
The pX_cmd_instr [2:0] signal is used to designate the requested command.The Spartan-6 FPGA MCB design allows reads, writes, and refreshes to be requested from the user/native interface.
| Operation | Code |
| Read | 001 |
| Write | 000 |
| Read with Auto Precharge | 011 |
| Write with Auto Precharge | 010 |
| Refresh | 1xx |
Based on the command and address requested by the user, the MIG design executes all required commands, that is,activates, precharges, and so on with appropriate timing to adhere to the JEDEC standard.
For a complete list of the User Interface command signals and their functions, see UG388 under "MCB Functional Description > Interface Details > User (Fabric Side) Interface > Command Path".| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 43323 | MIG Spartan-6 MCB - Driving the User Interface | N/A | N/A |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 43441 | MIG Spartan-6 MCB - Controller Responsibilities | N/A | N/A |
| 43323 | MIG Spartan-6 MCB - Driving the User Interface | N/A | N/A |
| AR# 43357 | |
|---|---|
| 日期 | 12/15/2012 |
| 状态 | Active |
| Type | 综合文章 |
| 器件 | |
| IP | |