I am attempting to exercise the interfaces on the Virtex-6 FPGA ML605 Evaluation Kit.
What tests can be run to ensure that the interfaces are working correctly?
Virtex-6 FPGA ML605 Evaluation Kit Documentation and Reference Designs referenced below can be found on the ML605 Support page.
| Feature | Test Design | Notes |
| ML605 | ||
| Configuration Interfaces | ||
| Configuration Mode Pins | ML605 User Guide (UG534) | Table 1-33 has the valid settings. Assuming BPI, Platform Flash, and System ACE configured properly, this can test the mode pins. |
| Configuration USB JTAG port | ML605 BIST (XTP056) | See "Program ML605 with BIST Design" |
| Configuration BPI Flash | ML605 BIST (XTP056) | |
| Configuration System ACE | ML605 BIST (XTP056) | Assumes a properly constructed System ACE card. See XTP055 for restoring contents. |
| Configuration Platform Flash XL | ML605 BIST (XTP056) | |
| Board Feature Interfaces | ||
| Board DDR3 SODIMM | ML605 BIST (XTP056) | Also tested with the ML605 MIG design. |
| Board DVI PHY | ML605 BIST (XTP056) | |
| Board PCIe Edge Connector | ML605 PCIe x4 Example Design (XTP045) | Can also use ML605 PCIe x8 example (XTP044). |
| Board SFP Connector | ML605 IBERT Design (XTP046) | Requires Molex 74720-0501. |
| Board USB 2.0 host | XTP048 | |
| Board USB 2.0 client | XTP048 | |
| Board Oscillator (200 MHz, differential) | ML605 BIST (XTP056) | The default BIST examples use the socket clock. |
| Board RJ45 - Ethernet | ML605 BIST (XTP056) | |
| Board USB Serial UART | ML605 BIST (XTP056) | |
| Board Power Monitoring Interface (TI PMBus) | (Xilinx Answer 37561) | Requires the TI USB EVM Adapter; See (Xilinx Answer 54022) |
| Board I2C Interface | ML605 BIST (XTP056) | |
| Board FMC-HPC Connector | XM105 User Guide (UG537) | Page 29. This is the User Guide for the XM105 mezzanine debug card. This card has DS5, DS6, and DS7 which indicate good power to the board. Debug strategies will vary depending on the specific mezzanine card being used. Can also use XTP091. |
| Board FMC-LPC Connector | XM105 User Guide (UG537) | Page 29. This is the User Guide for the XM105 mezzanine debug card. This card has DS5, DS6, and DS7 which indicate good power to the board. Debug strategies will vary depending on the specific mezzanine card being used. Can also use XTP091. |
| Board System Monitor Interface | ML605 BIST (XTP056) | Can also use the specialized ML605 System Monitor example design. |
| Transceiver Interfaces | ||
| Transceiver RefCLK (differential) | XTP046 | This is the IBERT example and could be modified to use SMA RefCLK |
| Transceiver SMA Connectors (differential) | ML605 IBERT Design (XTP046) | |
| User Specified Interfaces | ||
| User CLK Socket Connector (Single-Ended) | ML605 BIST (XTP056) | All designs in the BIST use the socket clock source. |
| User SMA CLK Connectors (differential) | none available | These are completely user-driven I/O. A good test would be loop back or monitoring differential I/O on a scope. |
| User SMA Connectors (differential) | none available | These are completely user-drive differential clocks. It might be possible to modify an example design to use these instead of the socketed oscillator. |
| User LEDs | ML605 BIST (XTP056) | |
| User DIP switches | ML605 BIST (XTP056) | |
| User PushButtons | ML605 BIST (XTP056) | |
| User LCD Display | ML605 BIST (XTP056) | |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 43748 | Xilinx Boards and Kits - Debug Assistant | N/A | N/A |
| AR# 43848 | |
|---|---|
| 日期 | 01/21/2014 |
| 状态 | Active |
| Type | 综合文章 |
| Boards & Kits | |