Select the appropriate Design Assistant below to learn more about designing with a MIG core or to find help on debugging an issue that you are currently encountering.
The MIG Design Assistants walk you through the recommend design flow for MIG while debugging commonly encountered issues such as simulation issues, calibration failures, and data errors.
The Design Assistants provide useful design and troubleshooting information, but also point you to the exact documentation you need to read to help you design efficiently with MIG.
Note: This answer record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243).
The Xilinx MIG Solution Center is available to address all questions related to MIG.
Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
UltraScale Memory
MIG IP UltraScale Design Checklist| (Xilinx Answer 51313) | MIG 7 Series Design Assistant |
| (Xilinx Answer 34266) | MIG Virtex-6 Design Assistant |
| (Xilinx Answer 37496) | MIG Spartan-6 Design Assistant |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 34243 | Xilinx Memory Interface Solution Center | N/A | N/A |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 34266 | Xilinx Virtex-6 MIG Solution Center - Design Assistant | N/A | N/A |
| 37496 | Xilinx Spartan-6 MIG Solution Center - Design Assistant | N/A | N/A |
| 51313 | Xilinx MIG 7 Series Solution Center - Design Assistant | N/A | N/A |