AR# 46142

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IBERT Design Assistant - Using IBERT to optimize transceiver settings to a particular board configuration

描述

In order to create a reliable, low bit error rate (BER)link betweentwo high speed transceivers, transceiver settings should be optimized to a specific board configuration. The following answer record provides information onfeaturesin IBERTthat can be used to achieve this task.

Note: This Answer Record is a part of the Xilinx ChipScope Solution Center (Xilinx Answer 45310). The Xilinx ChipScope Solution Center is available to address all questions related to the ChipScope tool. Whether you are starting a new design with the ChipScope tool or troubleshooting a problem, use the ChipScope Solution Center to guide you to the right information.

解决方案

Xilinx transceivers have many features that can be used to improve a high speed link.The transmitter can be configured such that it will maximize signal integrity on the link. The receiver can then be configuredto improve its ability to recover data from a link. Below are just a fewof the features available in Xilinx high speed transceivers that can be used to create a more reliable link.

  • Pre/post emphasis
  • RX Equalization (this includes DFE and LPM)

These attributes can be changed to optimize the transceiver to your board configuration. These can greatly increase the margin of a link to reduce the BER. For more information on how these attributes will change the behavior of a link, please see (Xilinx Answer 46892). These features vary across the different device families that have GTs available. Refer to the transceiver user guide for each device familyfor more information on what features are available for a particular device family.

The IBERT tool allows you to change every port and attribute setting available in the transceiver on the fly. This can be very useful since it allows you to instantly see the effect a setting will have on the transceiver.

Sweep Testing

The only way to determine which transceiver settings will provide an optimal setup is to try out each setting on the board and analyze how it has affected your high speed link. This is a potentially lengthy process since there are a very large number of settings available. Fortunately, the IBERT core has a tool that can automate thistesting process. The sweep test is used to set up a channel test that will sweep through various transceiver settings. At the end of the test, it will provide results of the tests to help you determine which settings will produce.

For more information on the sweep test tool, please refer to the ChipScope User Guide and refer to the "Sweep Test" Section:

http://www.xilinx.com/support/documentation/dt_chipscopepro.htm

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
45310 Xilinx ChipScope Solution Center N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
46892 IBERT Design Assistant - How does pre/post emphasis affect a high speed serial interface? N/A N/A
AR# 46142
日期 12/15/2012
状态 Active
Type 综合文章
器件 More Less
IP More Less
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