AR# 47817

描述

This answer record discusses the 7 series FPGAs GTX Transceiver power-up/power-down sequencing recommendations and its implications.

解决方案

1) Recommended power-up/power-down sequence:

The recommended GTX transceiver power-on sequence is V_CCINT, V_MGTAVCC, V_MGTAVTT or V_MGTAVCC, V_CCINT, V_MGTAVTT to achieve minimum current draw. There is no recommended sequencing for V_MGTVCCAUX. Both V_MGTAVCC and V_CCINT can be ramped up simultaneously. The recommended power-off sequence is the reverse of the power-on sequence to achieve minimum current draw.

If the recommended sequences are not met, current drawn from V_MGTAVTT can be higher than specifications during power-up and power-down:

• When V_MGTAVTT is powered up before V_MGTAVCC, and V_MGTAVTT - V_MGTAVCC > 150 mV and V_MGTAVCC < 0.7V, the V_MGTAVTT current draw can increase by 460 mA per transceiver when V_MGTAVCC is ramping up. The duration of the current draw can be up to 0.3* T_MGTAVCC (ramp time from GND to 90% of V_MGTAVCC). 
• When V_MGTAVTT is powered up before V_CCINT , and V_MGTAVTT - V_CCINT > 150 mV and V_CCINT < 0.7V, the V_MGTAVTT current draw can increase by 50 mA per transceiver when V_CCINT is ramping up. The duration of the current draw can be up to 0.3* T_VCCINT (ramp time from GND to 90% of V_CCINT).
• When V_MGTAVCC is powered down before V_MGTAVTT, and V_MGTAVTT - V_MGTAVCC > 150 mV and V_MGTAVCC < 0.7V, the V_MGTAVTT current draw can increase by 460 mA per transceiver when V_MGTAVCC is ramping down. The duration of the current draw can be up to 0.3* T_MGTAVCC (ramp time from 100% to 10% of V_MGTAVCC). 
• When V_CCINT is powered down before V_MGTAVTT , and V_MGTAVTT - V_CCINT > 150 mV and V_CCINT < 0.7V, the V_MGTAVTT current draw can increase by 50 mA per transceiver when V_CCINT is ramping down. The duration of the current draw can be up to 0.3* T_VCCINT (ramp time from 100% to 10% of V_CCINT).

2) For the 7 Series GTX Transceiver General ES Silicon ONLY:

Please note that this section does not apply to GTX Production silicon.

2 a) If the recommended power sequences are not met, then the GTX transceiver can become inoperative if both of the following conditions occur at the same time:

• V_MGTAVTT is within its recommended operating range
  AND
• V_MGTAVCC is at a voltage less than 0.4V for more than 10,000 cumulative hours

An additional 100 mA per transceiver is drawn from V_MGTAVTT when V_MGTAVTT is within its recommended operating range and V_MGTAVCC is at a voltage of 0.4V or less.

2 b) If the recommended power-up sequence is followed, while V_MGTAVCC is powered within its recommended operating range and V_MGTAVTT is below 0.7V, an additional 50 mA per GTX transceiver is drawn from V_MGTAVCC. Depending on the number of transceivers used, this extra current could be greater than reported in XPE.

Follow this procedure to determine if the power supply regulator for V_MGTAVCC is sufficient:

1. Refer to Table 5-2 Kintex-7 FPGA GTX Transceiver Power Supply Grouping Per Package in the 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476) and Table 1 Virtex-7 FPGA GTX/GTH Transceiver Power Supply Grouping Per Package to determine the total number of QUADs per power supply grouping
2. Refer to Table 2: Total GTX V_MGTAVCC Current for Number of QUADs in a Power Supply Grouping to determine the maximum V_MGTAVCC current per power supply grouping.
3. Calculate the V_MGTAVCC power consumption per power supply grouping based on the number of transceivers used using XPE.
4. If the current value obtained from XPE in Step 3 is greater than or equal to the current value obtained in Step 2, no change is required.
5. If the current value obtained from XPE in Step 3 is less than the current value obtained in Step 2, it is recommended that the power supply regulator for V_MGTAVCC be enhanced to account for this extra current.

Table 1: Virtex-7 FPGA GTX/GTH Transceiver Power Supply Grouping Per Package

Notes:

1. Power Pins and Pinout for QUAD113 and QUAD213 are made available for seamless migration/swapping to the XC7VX485T, XC7VX550T and the XC7VX690T.
2. Power Pins and Pinout for QUAD110, QUAD210, QUAD111 and QUAD211 are made available for seamless migration/swapping to the XC7VX550T.

Table 2: Total GTX V_MGTAVCC Current for Number of QUADs in a Power Supply Grouping

3) Frequently Asked Questions

1) What should these additional currents be added to when not following the recommended sequences?

For GTX Production Silicon, this assumes that XPE 14.2 version or newer is used. For GTX General ES silicon, this assumes that XPE 13.4 version or newer is used.

• If the recommended sequence is used, there are no additional currents to be added.
• If the recommended sequence is not used, then the additional currents mentioned are added on top of the XPE numbers.

2) Simultaneous power-up: Is it okay to simultaneously power-up V_MGTAVCC and V_MGTAVTT, OR V_CCINT and V_MGTAVTT, OR all three? Does the additional current draw still apply?

• During power-up, if V_MGTAVCC < 0.7V (Time "T1" in the picture) and V_MGTAVTT - V_MGTAVCC <= 150 mV, then there is no additional current draw. During power-up, if V_MGTAVCC >= 0.7V (Time "T1" in the picture), then there is no additional current irrespective of V_MGTAVTT value.
• During power-up, if V_MGTAVCC < 0.7V (Time "T1" in the picture) and V_MGTAVTT V_CCINT <= 150 mV, then there is no additional current draw. During power-up, if V_CCINT >= 0.7V (Time "T1" in the picture), then there is no additional current irrespective of V_MGTAVTT value.

If these conditions cannot be met, then the additional current needs to be accounted for.

3) Are these additional currents on V_MGTAVTT cumulative when both sequences of V_MGTAVTT vs V_MGTAVCC and V_MGTAVTT vs V_CCINT are not followed?

The power supply current increase is cumulative. So, if both conditions occur simultaneously, the total is 510mA (460 mA + 50 mA) extra on V_MGTAVTT for Production silicon and 610 mA (460 mA + 50 mA + 100 mA) extra on V_MGTAVTT for General ES silicon when conditions in section 2.1 also apply.

4) What is the impact of this additional current and when does this happen?

This additional current happens only on the power-up and power-down ramp. Once the GTX transceivers are powered up and running, then this has no impact.

5) What are the key things to keep in mind for the recommended power sequencing to avoid the additional current draw?

V_MGTAVTT must be powered up last. V_MGTAVCC and V_CCINT must be powered up before V_MGTAVTT but they can be in any order. V_MGTAVCCAUX has no recommended sequencing. These are the criterion that ensure the recommended sequencing is met and there is no current draw.

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