For both the Virtex-6 and 7 series FPGA MIG DDR3/DDR2 designs, the "cmd" signal is the Native Interface input that selects the command for the current request.
In the Virtex-6 and 7 series FPGA Memory Interface User Guides (UG406 and UG586), the codes for the "cmd" bus are incorrect; showing a read is signified by "000" and a write by "001".
This will be resolved in a later revision of these two documents.
Be sure to signify a read with "001" and a write with "000" when interfacing to the Native Interface. The tables for the app_cmd input to the User Interface are correct.
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 54025 | MIG 7 Series - IP Release Notes and Known Issues for Vivado | N/A | N/A |
| AR# 56451 | |
|---|---|
| 日期 | 07/26/2013 |
| 状态 | Active |
| Type | 已知问题 |
| 器件 | |
| IP | |