AR# 58621

描述

Version Found: v2.0 Rev1
Version Resolved: See (Xilinx Answer 54025)

When two MIG 7 Series IP controllers of the same memory interface type are added to a Vivado project, it is possible for the following critical warnings to appear:

CRITICAL WARNING: [Designutils 20-1741] File "mig_7series_v2_0_memc_ui_top_axi.v" is used by both "design_1_mig_7series_1_1" and "design_1_mig_7series_0_0", but with different contents. This may lead to unpredictable results. Please use the report_ip_status command to resolve the differences or synthesize the modules independently. (Files are: "/ipi-latest/ipi.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_1_1/design_1_mig_7series_1_1/user_design/rtl/ip_top/mig_7series_v2_0_memc_ui_top_axi.v" and "/ipi-latest/ipi.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0/user_design/rtl/ip_top/mig_7series_v2_0_memc_ui_top_axi.v")

CRITICAL WARNING: [Designutils 20-1741] File "mig_7series_v2_0_ddr_phy_top.v" is used by both "design_1_mig_7series_1_1" and "design_1_mig_7series_0_0", but with different contents. This may lead to unpredictable results. Please use the report_ip_status command to resolve the differences or synthesize the modules independently. (Files are: "/ipi-latest/ipi.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_1_1/design_1_mig_7series_1_1/user_design/rtl/phy/mig_7series_v2_0_ddr_phy_top.v" and "/ipi-latest/ipi.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0/user_design/rtl/phy/mig_7series_v2_0_ddr_phy_top.v")

解决方案

These messages appear because the same "mig_7series_v2_0_ddr_phy_top.v" file name is used for each IP, but the files are not equivalent because of the differences in the "X_CORE_INFO".

The "X_CORE_INFO" is used for Xilinx WebTalk and has no effect on the functionality of the module.

These CRITICAL WARNING messages can be safely ignored. 

If desired, the following command can be run in the Vivado Tcl Console to completely remove them:

set_property is_enabled false [get_files {/path/to/ip/mig_7series_v2_0_memc_ui_top_std.v /path/to/ip/mig_7series_v2_0_ddr_phy_top.v}]

Revision History
12/18/2013 - Initial release