AR# 58635

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MIG 7 Series RLDRAM3 - Simulations fail when run from the Vivado tool

描述

Version Found: v2.0 Rev1
Version Resolved: See (Xilinx Answer 54025)

MIG 7 Series RLDRAM3 simulations will fail when executed from the Vivado tool. This is because the simulation model files should be used only for "Simulation" but by default are set for synthesis, implementation and simulation. This will result in CRITICAL WARNINGS and the following error messages when using ModelSim or QuestaSim.

# ** Error: /proj/dsv/shiv/utf_tests/HEAD/sim_lib/MIG_K7_RLD3/test2/mig_7series_0_example/mig_7series_0_example.srcs/sim_1/imports/sim/statetable.v(29): Could not find the package (rldram3_package). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.

# ** Error: /proj/dsv/shiv/utf_tests/HEAD/sim_lib/MIG_K7_RLD3/test2/mig_7series_0_example/mig_7series_0_example.srcs/sim_1/imports/sim/statetable.v(32): near "dutconfig": syntax error, unexpected IDENTIFIER, expecting ')'

解决方案

To work around the problem, run the ModelSim/QuestaSim or Vivado Simulator simulation scripts from the ./<design_name>.srcs\sources_1\ip\<design_name>\<design_name>\example_design\sim\sim.do or xsim_run.bat/.sh.

If you are still having problems please contact Xilinx Technical Support.

Revision History
12/18/2013 - Initial release

AR# 58635
日期 12/06/2013
状态 Active
Type 已知问题
器件
IP
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