AR# 64143

描述

A simulation failure can occur in Vivado 2015.1 with data mismatch in demo_tb:

Time: 1008227580 ps  Iteration: 5  Process: /demo_tb/stimulus/p_tx_monitor  File: /proj/XCOresults/viper/2015.1/2015.1/IP3_xco-viper-test_REL_2015.1_2015-02-28_19-01-00/REL/2015.1/hw/gig_ethernet_pcs_pma/gig_ethernet_pcs_pma_v15_0/xresults/synth_impl_check_random/exdes_selflec_synth_impl/gig_ethernet_auto_dv__conf_90/my_ip_example/my_ip_example.srcs/sim_1/imports/simulation/stimulus_tb.vhd
Error: Tx frame data: 38, Tx record data: 6
Tx Monitor: data incorrect during frame1

Time: 1008275580 ps  Iteration: 5  Process: /demo_tb/stimulus/p_tx_monitor  File: /proj/XCOresults/viper/2015.1/2015.1/IP3_xco-viper-test_REL_2015.1_2015-02-28_19-01-00/REL/2015.1/hw/gig_ethernet_pcs_pma/gig_ethernet_pcs_pma_v15_0/xresults/synth_impl_check_random/exdes_selflec_synth_impl/gig_ethernet_auto_dv__conf_90/my_ip_example/my_ip_example.srcs/sim_1/imports/simulation/stimulus_tb.vhd
Error: Tx frame data: 159, Tx record data: 90
Tx Monitor: data incorrect during frame1

解决方案

This is due to an UltraScale GTHE3 model issue. 

This is due to be fixed in Vivado 2015.3.

Currently there is no work-around for this issue.  

This applies to all UltraScale models that have GTHE3 transceivers.