2. 技术支持
  3. AR# 6538: ModelSim (MXE, SE, PE) - VLOG Error: "Unresolved reference to 'glbl'" occurs when I try to simulate a Verilog design with Xilinx software version 2.1i (or later) (Verilog)
  4. AR# 65386: MIG 7 Series - When MEM_BITS changed in simulation model, FATAL error seen during simulation of MIG example design

AR# 65386

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MIG 7 Series - When MEM_BITS changed in simulation model, FATAL error seen during simulation of MIG example design

描述

Version Found: MIG 7 Series v2.3 Rev2

Version Resolved: See (Xilinx Answer 54025)

The below error is seen with Vivado simulator when simulating a MIG example design (with a modified MEM_BITS parameter value of 26 in the ddr3_model_parameters.vh file) on a Red Hat Linux machine.

FATAL_ERROR: Vivado Simulator kernel has discovered an exceptional condition from which it cannot recover. Process will terminate. For technical support on this issue, please open a Web Case with this project attached at http://www.xilinx.com/support.

The same design hangs when run on a Windows 7 machine.

解决方案

This is a known issue with Vivado Simulator.

Until this is fixed, QuestaSim can be used as a work-around.

Revision History

25/09/2015 - Initial Release

AR# 65386
日期 10/19/2015
状态 Active
Type 已知问题
器件
Tools
IP
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