Version Found: DDR4/3 v2.1; RLD3 v1.3, QDRII+ v1.3; QDRIV v1.2
Version Resolved: See (Xilinx Answer 58435)
When opening a Vivado project in 2016.3 that was created with an older Vivado version, implementation will fail with the following error if the Memory IP is not upgraded:
[Mig 66-119] Phy core regeneration & stitching failed. Please check vivado.log and debug_core_synth.log files in the directory
The PHY IP is required to be updated in each Vivado release. If the full IP cannot be upgraded, please open a Service Request.
Release History:
10/05/2016 - Initial Release
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 58435 | MIG UltraScale - IP Release Notes and Known Issues for Vivado 2014.1 and newer tool versions | N/A | N/A |