2. IP 核
  3. Spartan-3 LogiCORE Endpoint PIPE for PCI Express (PCIe)
  4. LogiCORE IP Endpoint PIPE for PCI Express Software Requirements

LogiCORE IP Endpoint PIPE for PCI Express Software Requirements

硬件评估超时时间 *：大约 8 小时

SOFTWARE Requirements Table

LogiCORE™ Version Required Patches Software Support Supported Device Families
Endpoint PIPE for PCI Express® v1.8 ISE® 12.2 ISE® 12.2 Spartan®-3 (-4)
Spartan-3E (-4)
Spartan-3A (-4)

SIMULATION Requirements

Accessing the NXP PX1011A PHY Simulation Files

A NXP PX1011A-EL1 PCI Express PHY model is required to simulate the Xilinx LogiCORE™ IP Endpoint PIPE for PCI Express (EF-DI-PCIE-PIPE-SITE). This PHY model is the property of NXP, and is not included with the Xilinx LogiCORE IP release. Please refer to the Getting Started Guide for information on accessing this model.

Be sure to include your complete contact information in any correspondence with NXP to facilitate a prompt response.

从 Xilinx.com 下载页面下载所需的软件。如欲了解有关新特性、已知问题和补丁的信息，请参考许可解决方案中心。

* 上述任何 IP 核的硬件评估许可证都将帮助您在您的设计中生成这些内核，并对其进行参数化和实例化。此外，您还能够执行功能及时序仿真，并生成一个您可用于下载和配置您的硬件设计的比特流。

该表中的 IP 核将在编程的器件中全面工作一段时间。这段时间之后，IP 将“超时”（停止工作），您需要再次下载并配置 FPGA。