乘法累加器

与 Xilinx ISE 软件一起提供

The Multiplier Accumulator IP core product is a parallel multiplier accumulator module that performs fixed or programmable-length accumulations. The core's A and B inputs use unsigned or signed data of up to 32 bits wide. The core has selectable pipeline levels. It offers truncation and rounding of the multiplier output. The core also has an accumulation saturation option, optional carry in, carry out, overflow pins, and input/output registers.