AR# 24656

描述

The Virtex-4 RocketIO Wizard v1.4, Aurora Wizard v2.6, and earlier, typically set these attributes correctly. However, in some conditions the Wizard selects incorrect attribute settings for RXVCODAC_INIT, VCODAC_INIT, TXCPSEL, RXCPSEL, and RXRCPADJ. If these values are set incorrectly, the RX and TX PLLs can fail to lock or can exhibit excess jitter.

解决方案

The correct settings for RXVCODAC_INIT, VCODAC_INIT, TXCPSEL, RXCPSEL, and RXRCPADJ depend on the VCO frequency. VCO frequency is equal to the REFCLK frequency times of the RX/TXPLLNDIVSEL attribute (Fvco = Frefclk * PLLNDIVSEL).

VCODAC_INIT and RXVCODAC_INIT*

2.488 GHz < Fvco <= 2.99 GHz - VCODAC_INIT, RXVCODAC_INIT = 0x005.

2.99 GHz < Fvco <= 4.19 GHz - VCODAC_INIT, RXVCODAC_INIT = 0x029.

4.19 GHz < Fvco <= 4.75 GHz - VCODAC_INIT, RXVCODAC_INIT = 0x21F.

4.75 GHz < Fvco <= 5 GHz - VCODAC_INIT, RXVCODAC_INIT = 0x251.

TXCPSEL and RXCPSEL

Analog CDR:

2.488 GHz < Fvco <= 3.124 GHz - TXCPSEL, RXCPSEL = FALSE.

3.124 GHz < Fvco < 5.0 GHz - TXCPSEL, RXCPSEL = TRUE.

Digital CDR (Oversampling):

RXCPSEL = FALSE always.

RXRCPADJ

This attribute affects only the Analog CDR.

2.488 GHz < Fvco <= 2.7 GHz - RXRCPADJ = 010.

2.7 GHz < Fvco <= 4.0 GHz - RXRCPADJ = 011.

4.0 GHz < Fvco <= 5 GHz - RXRCPADJ = 110.

Virtex-4 RocketIO Wizard v1.5 and later will set these attributes correctly.

*These numbers have been optimized for reliability and PLL lock time. Smaller than recommended values may result in longer lock times and masking of otherwise marginal conditions.