What is an IBIS model (as opposed to a SPICE model)?
IBIS (Input Output Buffer Information Specification) is a method of providing the Input/Output device characteristics through V/I data without disclosing any circuit/process information. It can be thought of as a behavioral modeling specification suitable for transmission line simulation of digital systems, and it is applicable to most digital components.
Xilinx provides IBIS models instead of SPICE models because SPICE models contain proprietary information. However, Xilinx does provide some HSPICE and Eldo Models for high-speed modeling of I/Os (Virtex-6, Virtex-5, Virtex-4, and Virtex-II Pro).
To download IBIS and HSPICE models, go to:
http://www.xilinx.com/support/download/index.htm
For more information on IBIS models, please see:
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
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50653 | SelectIO Design Assistant: IBIS Models & Simulation - IBIS Model Background | N/A | N/A |
AR# 2932 | |
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日期 | 12/15/2012 |
状态 | Active |
Type | 综合文章 |