AR# 32946

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Endpoint Block Plus Wrapper v1.11 for PCI Express - Syntax error in x1 board_dual.v causes simulation failures

描述


Known Issue: v1.11



The x1 version of the board_dual.v has a syntax error in the instantiation of the core. This will cause failures in simulation.

This is only an issue with the x1 generated files.

解决方案


The issue is resolved by adding a comma to the end of line 162 in the file. This is the line:



.pci_exp_rxp( ((cor_pci_exp_txn[0] === 1'b1) && (cor_pci_exp_txp[0] === 1'b1)) ? 1'bx : cor_pci_exp_txp[0]),



The full corrected instantitation is:





xilinx_pci_exp_1_lane_downstream_port xilinx_pci_exp_1_lane_downstream_port (



// SYS Inteface

.sys_clk_p(dsport_sys_clk_p),

.sys_clk_n(dsport_sys_clk_n),

.sys_reset_n(cor_sys_reset_n),



// PCI-Express Interface

.pci_exp_txn(cor_pci_exp_rxn),

.pci_exp_txp(cor_pci_exp_rxp),



// The following muxing logic is a work-around due to the fact that the GTP Transceiver models

// output X values which propagate to the downstream port which in turn causes prohibitively

// long simulation times for link up. Refer to CR# 442695.

.pci_exp_rxn( ((cor_pci_exp_txn[0] === 1'b1) && (cor_pci_exp_txp[0] === 1'b1)) ? 1'bx : cor_pci_exp_txn[0]),

.pci_exp_rxp( ((cor_pci_exp_txn[0] === 1'b1) && (cor_pci_exp_txp[0] === 1'b1)) ? 1'bx : cor_pci_exp_txp[0]),

.pci_exp_rxn({(((cor_pci_exp_txn[3] === 1'bx) && (cor_pci_exp_txp[3] === 1'bx)) ? 1'b1 : cor_pci_exp_txn[3]), (((cor_pci_exp_txn[2] === 1'bx) && (cor_pci_exp_txp[2] === 1'bx)) ? 1'b1 : cor_pc i_exp_txn[2]), (((cor_pci_exp_txn[1] === 1'bx) && (cor_pci_exp_txp[1] === 1'bx)) ? 1'b1 : cor_pci_exp_txn[1]), (((cor_pci_exp_txn[0] === 1'bx) && (cor_pci_exp_txp[0] === 1'bx)) ? 1'b1 : cor_pci_exp_t xn[0])}),

.pci_exp_rxp({(((cor_pci_exp_txn[3] === 1'bx) && (cor_pci_exp_txp[3] === 1'bx)) ? 1'b1 : cor_pci_exp_txp[3]), (((cor_pci_exp_txn[2] === 1'bx) && (cor_pci_exp_txp[2] === 1'bx)) ? 1'b1 : cor_pc i_exp_txp[2]), (((cor_pci_exp_txn[1] === 1'bx) && (cor_pci_exp_txp[1] === 1'bx)) ? 1'b1 : cor_pci_exp_txp[1]), (((cor_pci_exp_txn[0] === 1'bx) && (cor_pci_exp_txp[0] === 1'bx)) ? 1'b1 : cor_pci_exp_t xp[0])})



);



Revision History

06/24/2009 - Initial Release
AR# 32946
日期 08/06/2010
状态 Active
Type ??????
IP
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