2 signals are not completely routed.
WARNING:ParHelpers:360 - Design is not completely routed.
u_memc_ui_top/u_mem_intfc/phy_top0/u_phy_data_io/gen_dqs[0].u_phy_dqs_iob/dqs_p_iodelay
u_memc_ui_top/u_mem_intfc/phy_top0/u_phy_data_io/gen_dqs[1].u_phy_dqs_iob/dqs_p_iodelay
NET "u_memc_ui_top/u_mem_intfc/phy_top0/u_phy_data_io/gen_dqs[0].u_phy_dqs_iob/u_iobuf_dqs/split_buf_net" S;
NET "u_memc_ui_top/u_mem_intfc/phy_top0/u_phy_data_io/gen_dqs[1].u_phy_dqs_iob/u_iobuf_dqs/split_buf_net" S;
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
34587 | MIG v3.4 - Release Notes and Known Issues for ISE Design Suite 12.1 | N/A | N/A |