It can be common in designs for the input clock to the DCM/PLL/MMCM to be changed during run time.
Can a mismatch with the CLKIN_PERIOD attribute cause problems?
The CLKIN_PERIOD attribute is used by software in the following ways:
If it is required to change the CLKIN frequency to a DCM/PLL/MMCM during run time, this can be done as long as the new CLKIN still meets the requirements of the DCM/PLL/MMCM.The PFD, VCO, I/O specifications need to be met in a PLL and MMCM, while the Frequency mode, I/O specifications need to be met for a DCM.In addition, it is also important to ensure that the design meets timing with all the different frequencies applied to the DCM/PLL/MMCM. This can be done by changing the Period Constraint in the ".pcf" file and re-running Timing Analyzer; this ensures that the same implementation file is used to analyze for all CLKIN frequencies.
Important Note:If the clock input frequency is changed, the DCM/PLL/MMCM must always be reset and allowed to lock onto the new input clock. The output clocks should not be used until the LOCK output goes High.
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
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46790 | Spartan-6 FPGA Design Assistant - Troubleshooting Common Clocking Problems | N/A | N/A |