The following error occurs when I generate one of the cores in Table 1 during synthesis.
This error indicates that the top EDIF file cannot be found:
ERROR:sim - Legacy padded EDIF netlist not found.
ERROR:sim - Failed executing Tcl generator.
Table 1 - List of Cores
cic_compiler_v2_0 | can_v3_1 |
cmpy_v3_1 | cpri_v4_1 |
cmpy_v5_0 | ethernet_statistics_v3_5 |
convolution_v7_0 | gig_eth_pcs_pma_v11_1 |
dds_compiler_v4_0 | obsai_v5_1 |
dds_compiler_v5_0 | pci_express_v3_7 |
lte_rach_detector_v1_0 | rxaui_v2_1 |
rs_decoder_v7_0 | ten_gig_eth_mac_v11_1 |
tcc_decoder_3gpplte_v2_0 | tri_mode_eth_mac_v5_1 |
tcc_decoder_3gpplte_v3_1 | xaui_v10_1 |
xfft_v7_1xbip_multadd_v2_0 | floating_point_v5_0 |
xfft_v8_0 |
The IP cores listed above deliver what is referred to as a Legacy top EDIF file.
If the "Create Netlist Wrapper with IO pads" option is selected for these cores, generation results in the error which refers to the padded netlist.
(In the .xco file this is selected with addpads=true )
The problem is that the generator creates the padded EDN file in the unique transient directory, which normally only holds temporary files for that generator.
This directory is deleted when the generator is done (unless in -d mode), so when a later generator process needs that file, the file is not found.
To work around this problem, copy the file to the transient source directory which is used for files needed between generators.
To avoid this error, you can do one of the following:
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
45457 | CORE Generator - Padded Netlist not created for source code core | N/A | N/A |