AR# 45527

描述

解决方案

Please make the following changes to implement LogiCORE IP Tri-Mode Ethernet MAC v5.2 on an KC705 RevC or an KC705 RevDboard.

Change from:

CONFIG PART = xc7k325tffg900-1;
Net clk_in_p LOC = AD12 | IOSTANDARD = DIFF_HSTL_II_18;
Net clk_in_n LOC = AD11 | IOSTANDARD = DIFF_HSTL_II_18;
Net glbl_rst LOC = AK4 | IOSTANDARD = LVCMOS15 | TIG;
Net config_board LOC = AD7 | IOSTANDARD = LVCMOS15;
Net mac_speed<0> LOC = Y28 | IOSTANDARD = LVCMOS15;
Net mac_speed<1> LOC = AA28 | IOSTANDARD = LVCMOS15;
Net gen_tx_data LOC = W29 | IOSTANDARD = LVCMOS15;
Net chk_tx_data LOC = Y29 | IOSTANDARD = LVCMOS15;
Net serial_response LOC = AJ24 | IOSTANDARD = LVCMOS15;
Net tx_statistics_s LOC = AK25 | IOSTANDARD = LVCMOS15;
Net rx_statistics_s LOC = AE25 | IOSTANDARD = LVCMOS15;

To:

CONFIG PART = xc7k325tffg900-2;
Net clk_in_p LOC = AD12 | IOSTANDARD = LVDS;
Net clk_in_n IOSTANDARD = LVDS;
Net glbl_rst LOC = AB7 | IOSTANDARD = LVCMOS15 | TIG;
Net config_board LOC = AC6 | IOSTANDARD = LVCMOS15;
Net mac_speed<0> LOC = Y28 | IOSTANDARD = LVCMOS25;
Net mac_speed<1> LOC = AA28 | IOSTANDARD = LVCMOS25;
Net gen_tx_data LOC = W29 | IOSTANDARD = LVCMOS25;
Net chk_tx_data LOC = Y29 | IOSTANDARD = LVCMOS25;
Net serial_response LOC = AJ24 | IOSTANDARD = LVCMOS25;
Net tx_statistics_s LOC = AK25 | IOSTANDARD = LVCMOS25;
Net rx_statistics_s LOC = AE25 | IOSTANDARD = LVCMOS25;

Revision History

03/06/2012 - Updated Constraints List
01/18/2012 - Initial Release

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