AR# 47652

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AXI Direct Memory Access (DMA) - Release Notes and Known Issues

描述

This Release Note and Known Issues Answer Record is for the AXI DMA and contains the following information:

  • General Information
  • Software Requirements
  • New Features
  • Resolved Issues
  • Known Issues

For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide (XTP025).

解决方案

General Information

New Features

Version

Reduced logic resources

Enabled descriptor queuing for Multi-Channel DMA

6.03a

6.01.a

Updated the CORE Generator GUI to remove the frequency fields. These are no longer required
as a specific relation between the frequencies have to be maintained for async mode

6.01.a

Vivado customization GUI has been simplified

6.01.a

Multi Channel DMA support enabled. Channel selection is based on TDEST. Refer user guide for more information

6.00.a

A number of new registers have been added for S2MM path. Refer the user guide for more information

6.00.a

Enabled Keyhole read/write feature

6.00.a

Store and Forward is now an optional feature when streaming data width is same as Mmap data width

6.00.a


Resolved Issues

Description

Version

N/A

A

6.03a

6.01.a

N/A

6.00.a


Known Issues

Description

Version

Axi_dma_v6_00_a is fully backward compatible. To move your existing designs to the new version make sure that parameter C_ENABLE_MULTI_CHANNEL is set to 0, C_NUM_MM2S_CHANNELS is set to 1, and C_NUM_S2MM_CHANNELS is set to 1.

6.00.a


This table correlates the core version to the first ISE software release version in which it was included.

Core Version

ISE Software Version

6.03a

6.01.a

14.4

14.2

6.00.a

14.1

AR# 47652
日期 01/07/2013
状态 Active
Type 已知问题
器件 More Less
Tools
IP
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