If I use Synplify to synthesize the Tri-Mode Ethernet MAC v5.1, v5.2 or v5.3 core example design, the address_decode.v file produces an error similar to the following:
@E:CS101 : tri_mode_eth_mac_v5_3_ver_address_decoder.v(156) | Index 32 is out of range for variable addr_nor
This error does not occur if I use the VHDL code version of the example design.
To resolve the error message, replace the existing Addr_bits function in the example_design/axi_ipif/core_name_address_decoder.v file with the following:
function integer Addr_Bits;
input[0:C_BUS_AWIDTH - 1] x;
input[0:C_BUS_AWIDTH - 1] y;
reg[0:C_BUS_AWIDTH - 1] addr_nor;
begin
addr_nor = x ^ y;
begin : ADDR_BITS_FUNCTION
integer i;
for(i = 0; i < C_BUS_AWIDTH; i = i + 1)
begin: LOOP
if (addr_nor[i] == 1'b1) begin
Addr_Bits = i;
disable LOOP;
end
end
end
end
endfunction
AR# 47896 | |
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日期 | 11/06/2014 |
状态 | Active |
Type | 综合文章 |
IP |