ERROR: [Synth 8-2913] Unsupported Dual Port Block-RAM template for ram_reg.
Or
ERROR: [Synth 8-2914] Unsupported RAM template for RAM ram_reg.
Warning: Trying to implement RAM "ram_reg" in registers. Block RAM or DRAM implementation is not possible for one or more of the following reasons : 1: RAM has multiple writes via different ports in same process. If RAM inferencing intended, write to one port per process. 2: Unable to determine number of words or word size in RAM. RAM "ram_reg" dissolved into registers
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
52264 | Does Vivado Synthesis support Asymmetric read/write port width block RAM inference? | N/A | N/A |