When creating a design with modules defined in the library "XilinxCoreLib", modules are not recognized when "Automatic Compile Order" is selected by right clicking in the design hierarchy tab.
Vivado does not support direct instantiation of modules from the "XilinxCoreLib" library name.
"XilinxCoreLib" is a legacy reserved library name and should not be used in Vivado due to potential conflict with legacy cores.
A warning message was added in Vivado 2014.2 to clearly indicate that this is not supported.
To resolve the issue, change the "XilinxCoreLib" library name to a new name that is not a reserved word.
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 61081 | Vivado 2014.1 compile_simlib fails with ERROR: [Vivado 12-2156] Invalid library 'xilinxcorelib' specified for -library | N/A | N/A |
| 50359 | Vivado IP 流程 - 如何为 Vivado 项目中的 IP 核生成结构仿真模型？ | N/A | N/A |