AR# 60924

描述

Note: This answer record is a part of the Xilinx Solution Center for Vivado HLS (Xilinx Answer 47428), which is available to address all questions related to Vivado HLS. Whether you are starting a new design or troubleshooting a problem, use the Solution Center for Vivado Synthesis to guide you to the right information. 

解决方案

Coding Style Guide

The support provided by Vivado HLS for the synthesis of C, C++ and SystemC is summarized in Xilinx Answer Record AR_DM3.

The Vivado Design Suite User Guide High-Level Synthesis includes a chapter on Coding Styles. This chapter explains everything related to synthesis of C, C++ and SystemC.

Each of the examples in the coding style guide is included with the Vivado HLS software. They can be accessed through the Welcome screen in the GUI or in the examples directory located in the Vivado HLS installation area.

Bit-Accurate C Modeling

When modeling hardware with C, C++ or SystemC, one of the primary techniques for ensuring good Quality of Results (QoR) in the FPGA device is to use arbitrary precision data types. 

Standard C data types allow variables to be modeled on 8-bit boundaries (8-bit, 16-bit, 32-bit, etc.). Arbitrary precision data types allow variables to be defined as any arbitrary bit-width (6-bit, 12-bit, 143-bit etc.).

This allows the C code to accurately model, and be synthesized to, the exact bit-widths required in hardware. 

For example, this ensures that if a multiplication operation only requires 18-bits, the designer is not forced to use a standard 32-bit C data-type, which would force the multiplier to be implemented with more than one DSP48 macro in the FPGA.

Another great advantage of using arbitrary precision data types is that the C model will simulate using the exact bit-sizes and fast C simulation can be used to verify the correct bit-accurate operation manner before synthesis. This allows rounding effects and signal to noise ratios etc. to be analyzed at the C level.

The use of arbitrary precision data types, including complete reference sections, is explained in the Vivado Design Suite User Guide High-Level Synthesis. A tutorial on using arbitrary precision types is provided in the Vivado HLS Tutorial.

Application note XAPP-1163 shows how a C design using floating-point data types can be implemented with floating-point FPGA blocks or migrated to an arbitrary precision fixed-point data type, resulting in much smaller and faster hardware for a small loss of accuracy.

Hardware Modeling with C Libraries

If these libraries are synthesized directly, the QoR in the FPGA hardware will be poor.  Vivado HLS provides its own math library which contains the most commonly used functions. When the Vivado HLS math library is used, the RTL implementation of the floating-point functions is guaranteed to be optimum.

The Application Note XAPP-599 explains how to use the Vivado HLS math libraries in a floating-point design. The QuickTake video Floating Point Design with Vivado HLS provides an overview of designing with floating-point types.

Vivado HLS also provides libraries to model functions from the OpenCV video library and common video design operation such as a line-buffer and image-window. 

The Application Note XAPP-793 provides details on using the standard video functions (line-buffers etc.) and Application Note XAPP-1167 (design files here) shows how a C program using OpenCV functions can be synthesized with Vivado HLS and implemented as high-performance FPGA hardware. 

An introduction to using OpenCV libraries in a Vivado HLS design is provided in the QuickTake video Leveraging OpenCV and High Level Synthesis with Vivado.

The Vivado Design Suite User Guide High-Level Synthesis explains all C libraries provided with Vivado HLS and lists the supported functions.

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