The following "Name Protected" error is received when using Cadence IUS for simulation:
ncelab: *F,GENPAR: VHDL generic {*Name Protected*}.{*Name Protected*} displayport_v4_2_rx_vid_fifo.vhd: line 249, position 17) and verilog parameter being overridden {*Name Protected*}.{*Name Pr otected*} fifo_generator_v11_0.v: line -1, po sition -1) are not type compatible.
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
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54522 | LogiCORE IP DisplayPort -面向 Vivado 2013.1 和更新工具版本的版本说明和已知问题 | N/A | N/A |
AR# 61683 | |
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日期 | 08/05/2014 |
状态 | Archive |
Type | 综合文章 |
IP |