AR# 61736

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SEM IP Soft Error Mitigation - What is the valid range of addresses for error injection by LFA targeting Spartan 6 devices?

描述

The SEM IP error injection capability is a useful feature that enables hardware-based evaluation of the SEM IP functionality, enables testing to confirm that the IP has been integrated into the larger design as intended, and enables testing of the larger design as intended.

When performing error injection into the configuration memory, Xilinx recommends following the guidance in (Xilinx Answer 61241) Soft Error Mitigation IP Guidance for testing with error injection.

解决方案

For Spartan-6 devices, the range of valid LFA for error injection and detection is from LFA 0000000 to LFA Maximum Frame (MF).

The maximum Frame value for the target device is available by using the "Status Report" command with the monitor interface.

The values are also available in the tables below.

According to which GT are used in the design, start address or max address range is set differently at time of SEM IP generation.

Error injection should also be limited to the same range as IP is configured to scan for errors.

See (Xilinx Answer 52716) Design Advisory for Spartan-6 FPGAs - Configuration Readback including SEM_IP or POST_CRC causes power distribution network noise affecting SelectIO and GTP interfaces

 

 

NO GTs in these devices. All type 0 frames coveredBottom Address Upper Address 
 SF (decimal)SF (hex)MF (decimal)MF (hex)
LX40020267EA
LX90020267EA
LX16002974B9E
LX2500506313C7
LX45009086237E
LX7500153823C16
LX10000203024F4E
LX15000272386A66
     
     
LXT devices - but NO GT rows are skipped (same range as above). All type 0 frames coveredBottom Address Upper Address 
 SF (decimal)SF (hex)MF (decimal)MF (hex)
LX25T00506313C7
LX45T009086237E
LX75T00153823C16
LX100T00203024F4E
LX150T00272386A66
     
LXT devices. Skipping top GT row reduces MFBottom Address Upper Address 
   MF (decimal)MF (hex)
LX25T  4050FD2
LX45T  79501F0E
LX75T  141003714
LX100T  1861048B2
LX150T  249686188
     
LXT devices. Skipping bottom GT row increases SFBottom Address Upper Address 
 SF (decimal)SF (hex)  
LX75T1280500  
LX100T169069A  
LX150T22688DC  
AR# 61736
日期 06/29/2021
状态 Active
Type 综合文章
器件
IP
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