AR# 65479

描述

When running simulation on a single lane transmit configuration example design using QuestaSim, issues have been seen including the simulation timing out on Asserting Sync.

This is due to an issue with QuestaSim optimizing the design during the vopt step.

This Answer Record applies to versions of QuestaSim 10.4b and later.

解决方案

Once QuestaSim has been launched, in the Transcript area enter the following commands to re-optimize the libraries and restart the simulation:

1) For 7 Series use command a, and for UltraScale use b:

a)

vopt +acc -noprotectopt -L unisims_ver -L unimacro_ver -L secureip -L jesd204_v6_2_0 -L xil_defaultlib -L jesd204_phy_v3_0_0 -work xil_defaultlib xil_defaultlib.demo_tb xil_defaultlib.glbl -o demo_tb_opt

b)

vopt +acc -noprotectopt -L unisims_ver -L unimacro_ver -L secureip -L jesd204_v6_2_0 -L xil_defaultlib -L jesd204_phy_v3_0_0 -L gtwizard_ultrascale_v1_6_0 -work xil_defaultlib xil_defaultlib.demo_tb xil_defaultlib.glbl -o demo_tb_opt

2)

restart

3)

run -all

Command a) and b) must be updated to reflect the software version, core version, PHY version, and GT wizard version you are using as follows:

* For designs in Vivado 2016.4 and later, the XPM library is used for all CDC logic.  

For this reason, the "-L xpm" switch must be added after "-L secureip".

For example, for UltraScale in 2016.4 the following is added:

vopt +acc -noprotectopt -L unisims_ver -L unimacro_ver -L secureip -L xpm -L jesd204_v7_1_1 -L xil_defaultlib -L jesd204_phy_v3_2_1 -L gtwizard_ultrascale_v1_6_5 -work xil_defaultlib xil_defaultlib.demo_tb xil_defaultlib.glbl -o demo_tb_opt

An alternative is to add the -noprotectopt switch in the Elaboration tab for Simulation Settings in Vivado:

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