AR# 66987

描述

How should I deal with scoped constraints if I use post-synthesis OOC DCP instead of IP XCI, or the source code of the sub-module?

解决方案

The DCP file contains the netlist file as well as constraints.

In cases where IP OOC DCP is used instead of XCI:

• The IP DCP contains the IP constraints.
  When using XCI in the project, the tool automatically uses the native IP XDCs from the output products but not the constraints in the DCP.
  When using IP DCP instead of XCI, the tool uses the constraints included in the DCP.
  
• In general, Xilinx does not recommend using IP DCP instead of XCI. This flow can cause issues for some IPs (for example, FIFO and MIG).
  (UG896) contains the following recommendation in the "Third-Party Synthesis Flow" section in Chapter 5.
  • "Use the IP XCI file when referencing Xilinx IP in either Project Mode or Non-Project Mode and not the DCP file directly. While the DCP does contain constraints, they are resolved Out-Of-Context of the end-user constraints. Using the XCI results in the XDC output product for the IP being applied after all the netlists are combined (end-user and IP). Additionally, any Tcl script in the IP XDC is then evaluated in context of the end-user constraints and netlist."
• Starting from Vivado 2017.1, constraints used in Implementation will not be stored into the IP OOC DCP to discourage the use of IP OOC DCP standalone.
• The processing order of XDC files stored in IP DCP is the same as that of IP native XDCs.
  See (UG896) "Constraint File Processing Order" in Chapter 2.
  The DCP XDC processing order cannot be shown by using the report_compile_order command, but can be seen in the Timing Constraints Editor (Open Synthesized Design -> Go to Tools -> Edit Timing Constraints).

In cases where the OOC DCP of the sub-module is used in the top level design:

• If the OOC DCP does not include constraints (which means no XDC is used for the OOC Synthesis run of the sub-module), you can add the sub-module XDC file to the top level design if necessary and scope the XDC file to this sub-module.
  For more information on the use of Constraints Scoping, see (UG903) "Constraints Scoping" in Chapter 2.
  
• If the OOC DCP contains the constraints for the sub-module, the constraints in the DCP will be automatically sourced by the tool.
  
• The DCP generated in the synth_x folder in GUI project mode flow only contains the constraints used for the Synthesis process but no Implementation constraints.
  In order to generate the post-synthesis DCP that contains the full set of constraints scoped to the sub-module, you will need to follow these steps:

1. After Synthesis finishes, open the Synthesized Design.
2. In the Tcl Console, run the following command to generate the DCP:

write_checkpoint  xxx.dcp