AR# 67776

描述

On Zynq UltraScale+ MPSoC, programming the FPGA using the 'fpga' command immediately after the 'rst -srst' command fails with the error "fpga initialization failed".

解决方案

This occurs because Zynq UltraScale+ MPSoC needs the TMS to be held high for 5 cycles of TCK.

The issue can be resolved by adding a delay after 'rst -srst'. 

During this delay, the debugger holds TMS high for 5 cycles, while polling the JTAG devices.

Example Usage:

rst -srst
after 100
fpga file.bit

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