Version Found: v4.1 (Rev4)
Version Resolved and other Known Issues: (Xilinx Answer 65443)
I am generating the DMA Subsystem for PCI Express IP in "AXI-Bridge" mode.
If I set MSI-X implementation to be 'External' with a value for Table Size higher than the default value, the tool reports the following error message:
ERROR: [Common 17-70] Application Exception: Failed to create subcore IP 'design_1_xdma_4_2_pcie4_ip'..
This article is part of the PCI Express Solution Centre
(Xilinx Answer 34536) | Xilinx Solution Center for PCI Express |
This issue will be fixed in a future release of the core.
To fix the issue in Vivado 2019.2, please install the patch attached with this answer record.
For instructions on installing the patch, please check the instructions in the 'patch_readme' directory in the attached patch file.
Note: "Version Found" refers to the version where the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Revision History:
11/09/2019 - Initial Release
文件名 | 文件大小 | File Type |
---|---|---|
AR73001_Vivado_2019_2_preliminary_rev1.zip | 1 MB | ZIP |
AR# 73001 | |
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日期 | 11/11/2019 |
状态 | Active |
Type | 已知问题 |
IP |